Logic & Computer Design Fundamentals

Chapter 1: Digital Systems and Information

• • 1-1 Information Representation
• • 1-2 Abstraction Layers in Computer Systems Design
• • 1-3 Number Systems
• • 1-4 Arithmetic Operations
• • 1-5 Decimal Codes
• • 1-6 Alphanumeric Codes
• • 1-7 Gray Codes
• • 1-8 Chapter Summary

Chapter 2: Combinational Logic Circuits

• • 2-1 Binary Logic and Gates
• • 2-2 Boolean Algebra
• • 2-3 Standard Forms
• • 2-4 Two-Level Circuit Optimization
• • 2-5 Map Manipulation
• • 2-6 Exclusive-OR Operator and Gates
• • 2-7 Gate Propagation Delay
• • 2-8 Hardware Description Languages Overview
• • 2-9 HDL Representations—VHDL
• • 2-10 HDL Represenations—Verilog
• • 2-11 Chapter Summary

Chapter 3: Combinational Logic Design

• • 3-1 Beginning Hierarchical Design
• • 3-2 Technology Mapping
• • 3-3 Combinational Functional Blocks
• • 3-4 Rudimentary Logic Functions
• • 3-5 Decoding
• • 3-6 Encoding
• • 3-7 Selecting
• • 3-8 Iterative Combinational Circuits
• • 3-9 Binary Adders
• • 3-10 Binary Subtraction
• • 3-11 Binary Adder-Subtractors
• • 3-12 Other Arithmetic Functions
• • 3-13 Chapter Summary

Chapter 4: Sequential Circuits

• • 4-1 Sequential Circuit Definitions
• • 4-2 Latches
• • 4-3 Flip-Flops
• • 4-4 Sequential Circuit Analysis
• • 4-5 Sequential Circuit Design
• • 4-6 State-machine Diagrams and Applications
• • 4-7 HDL Representation for Sequential Circuits—VHDL
• • 4-8 HDL Representation for Sequential Circuits—Verilog
• • 4-9 Flip-Flop Timing
• • 4-10 Sequential Circuit Timing
• • 4-11 Asynchronous Interactions
• • 4-12 Synchronization and Metastability
• • 4-13 Synchronous Circuit Pitfalls
• • 4-14 Chapter Summary

Chapter 5: Digital Hardware Implementation

• • 5-1 The Design Space
• • 5-2 Programmable Implementation Technologies
• • 5-3 Chapter Summary

Chapter 6: Registers and Register Transfers

• • 6-1 Registers and Load Enable
• • 6-2 Register Transfers
• • 6-3 Register Transfer Operations
• • 6-4 Register Transfers in VHDL and Verilog
• • 6-5 Microoperations
• • 6-6 Microoperations on a Single Register
• • 6-7 Register-Cell Design
• • 6-8 Multiplexer and Bus-Baed Transfers for Multiple Registers
• • 6-9 Serial Transfer and Microoperations
• • 6-10 Control of Register Transfers
• • 6-11 HDL Representation for Shift Registers and Counters—VHDL
• • 6-12 HDL Representation for Shift Registers and Counters—Verilog
• • 6-13 Microprogrammed Control
• • 6-15 Chapter Summary

Chapter 7: Memory Basics

• • 7-1 Memory Definitions
• • 7-2 Random-Access Memory
• • 7-3 SRAM Integrated Circuits
• • 7-4 Array of SRAM ICs
• • 7-5 DRAM ICs
• • 7-6 DRAM Types
• • 7-7 Arrays of Dynamic RAM ICs
• • 7-8 Chapter Summary

Chapter 8: Computer Design Basics

• • 8-1 Computer Design Basics
• • 8-2 Datapaths
• • 8-3 The Arithmetic/Logic Unit
• • 8-4 The Shifter
• • 8-5 Datapath Representation
• • 8-6 The Control Word
• • 8-7 A Simple Computer Architecture
• • 8-8 Single-Cycle Hardwired Control
• • 8-9 Multiple-Cycle Hardwired Control
• • 8-10 Chapter Summary

Chapter 9: Instruction Set Architecture

• • 9-1 Computer Architecture Concepts
• • 9-2 Operand Addressing
• • 9-3 Addressing Modes
• • 9-4 Instruction Set Architectures
• • 9-5 Data-Transfer Instructions
• • 9-6 Data-Manipulation Instructions
• • 9-7 Floating-Point Computations
• • 9-8 Program Control Instructions
• • 9-9 Program Interrupt
• • 9-10 Chapter Summary

Chapter 10: RISC and CISC Processors

• • 10-1 Pipelined Datapath
• • 10-2 Pipelined Control
• • 10-3 The Reduced Instruction Set Computer
• • 10-4 The Complex Instruction Set Computer
• • 10-5 More on Design
• • 10-6 Chapter Summary

Chapter 11: Input-Output and Communication

• • 11-1 Computer I/O
• • 11-2 Sample Peripherals
• • 11-3 I/O Interfaces
• • 11-4 Serial Communication
• • 11-5 Modes of Transfer
• • 11-6 Priority Interrupt
• • 11-7 Direct Memory Access
• • 11-8 Chapter Summary

Chapter 12: Memory Systems

• • 12-1 Memory Hierarchy
• • 12-2 Locality of Reference
• • 12-3 Cache Memory
• • 12-4 Virtual Memory
• • 12-5 Chapter Summary